.forgejo/workflows
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succd: add ci, tests
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2024-09-28 16:09:07 +02:00 |
modules/ph00524
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ph00524: Add image of the back PCB side
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2024-10-05 03:11:29 +02:00 |
succbone
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succd: Use tigher hysteresis values
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2024-10-04 23:30:28 +02:00 |
.gitattributes
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Track .stl files in git-lfs
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2024-09-27 01:19:15 +02:00 |
.gitignore
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gitignore: Ignore FreeCAD backups
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2024-09-23 05:04:34 +02:00 |