adds command wrapper
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parent
cb95755998
commit
46ff7c865e
2 changed files with 58 additions and 18 deletions
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@ -1 +1,14 @@
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pub mod nextion;
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pub mod nextion;
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#[derive(Debug)]
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pub enum Command{
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SetRpm(u32),
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SetTimer(u32),
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Start,
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Stop,
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SendConfig,
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}
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#[derive(Debug)]
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pub enum ErrCommand{
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NoValidCmd,
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READ_ERROR
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}
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@ -1,9 +1,11 @@
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use esp_hal::uart::RxError;
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use esp_hal::uart::RxError;
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#[no_std]
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#[no_std]
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use esp_hal::uart::{self, Config, Uart};
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use esp_hal::uart::{Uart};
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use esp_hal::{Blocking, riscv::register::hpmcounter13h::read};
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use esp_hal::{Blocking };
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use rtt_target::{rprint, rprintln};
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enum UART_STATEMACHINE {
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use crate::peripherals::{ErrCommand,Command};
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enum UartStatemachine {
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WaitingP,
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WaitingP,
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WaitingE,
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WaitingE,
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Reading,
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Reading,
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@ -11,14 +13,14 @@ enum UART_STATEMACHINE {
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}
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}
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pub struct Nextion<'a> {
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pub struct Nextion<'a> {
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interface: &'a mut Uart<'static, Blocking>,
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interface: &'a mut Uart<'static, Blocking>,
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state: UART_STATEMACHINE,
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state: UartStatemachine,
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idx: usize,
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idx: usize,
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}
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}
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impl<'a> Nextion<'a> {
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impl<'a> Nextion<'a> {
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pub fn new<'b>(uart: &'a mut Uart<'static, Blocking>) -> Self {
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pub fn new<'b>(uart: &'a mut Uart<'static, Blocking>) -> Self {
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Nextion {
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Nextion {
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interface: uart,
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interface: uart,
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state: UART_STATEMACHINE::WaitingP,
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state: UartStatemachine::WaitingP,
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idx: 0,
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idx: 0,
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}
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}
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}
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}
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@ -26,7 +28,7 @@ impl<'a> Nextion<'a> {
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let _ = &self.interface.write(cmd);
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let _ = &self.interface.write(cmd);
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let _ = &self.interface.write(b"\xff\xff\xff");
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let _ = &self.interface.write(b"\xff\xff\xff");
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}
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}
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pub fn read_command(&mut self, buf: &mut [u8]) -> Result<usize, RxError> {
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fn read_frame(&mut self, buf: &mut [u8]) -> Result<usize, RxError> {
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let size: usize = 0;
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let size: usize = 0;
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let mut tmp_buf: [u8; 20] = [0; 20];
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let mut tmp_buf: [u8; 20] = [0; 20];
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let mut cmd_end_ctr = 0;
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let mut cmd_end_ctr = 0;
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@ -41,20 +43,20 @@ impl<'a> Nextion<'a> {
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self.interface.read(&mut char)?;
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self.interface.read(&mut char)?;
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let byte = char[0];
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let byte = char[0];
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match self.state {
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match self.state {
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UART_STATEMACHINE::WaitingP => {
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UartStatemachine::WaitingP => {
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if byte == b'P' {
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if byte == b'P' {
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self.state = UART_STATEMACHINE::WaitingE;
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self.state = UartStatemachine::WaitingE;
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}
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}
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}
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}
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UART_STATEMACHINE::WaitingE => {
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UartStatemachine::WaitingE => {
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if byte == b'E' {
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if byte == b'E' {
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self.state = UART_STATEMACHINE::Reading;
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self.state = UartStatemachine::Reading;
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self.idx = 0;
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self.idx = 0;
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}
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}
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}
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}
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UART_STATEMACHINE::Reading => {
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UartStatemachine::Reading => {
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if byte == b'\xff' {
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if byte == b'\xff' {
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self.state = UART_STATEMACHINE::Terminator(1);
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self.state = UartStatemachine::Terminator(1);
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} else {
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} else {
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if self.idx < buf.len() {
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if self.idx < buf.len() {
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buf[self.idx] = byte;
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buf[self.idx] = byte;
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@ -65,17 +67,17 @@ impl<'a> Nextion<'a> {
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}
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}
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}
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}
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}
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}
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UART_STATEMACHINE::Terminator(n) => {
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UartStatemachine::Terminator(n) => {
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if byte == b'\xff' {
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if byte == b'\xff' {
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if n >= 2 {
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if n >= 2 {
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let idx = self.idx;
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let idx = self.idx;
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self.reset();
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self.reset();
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return Ok(idx);
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return Ok(idx);
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} else {
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} else {
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self.state = UART_STATEMACHINE::Terminator(n + 1)
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self.state = UartStatemachine::Terminator(n + 1)
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}
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}
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} else {
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} else {
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self.state = UART_STATEMACHINE::Reading;
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self.state = UartStatemachine::Reading;
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let needed: usize = (n + 1).into(); // number of bytes to reinsert (FFs + current byte)
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let needed: usize = (n + 1).into(); // number of bytes to reinsert (FFs + current byte)
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@ -96,12 +98,37 @@ impl<'a> Nextion<'a> {
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}
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}
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}
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}
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}
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}
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pub fn read_command(&mut self) -> Result<Command,ErrCommand>{
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let mut buf:[u8;8] = [0;8];
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let read_bytes = self.read_frame(&mut buf).unwrap_or(return Err(ErrCommand::READ_ERROR));
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match buf[0]{
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01 => {Ok(Command::Start)},
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02 =>{Ok(Command::Stop)},
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03 => {
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let rpm = u32::from_be_bytes(buf[1..4].try_into().expect("failed to parse rpm!"));
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Ok(Command::SetRpm(rpm))
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},
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04 => {
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let time = u32::from_be_bytes(buf[1..4].try_into().expect("failed to parse time!"));
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Ok(Command::SetTimer(time))
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}
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05 => {
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Ok(Command::SendConfig)
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},
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_ => {
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Err(ErrCommand::NoValidCmd)
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}
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}
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}
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pub fn read_ready(&mut self) -> bool {
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pub fn read_ready(&mut self) -> bool {
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self.interface.read_ready()
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self.interface.read_ready()
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}
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}
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fn reset(&mut self) {
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fn reset(&mut self) {
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self.state = UART_STATEMACHINE::WaitingP;
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self.state = UartStatemachine::WaitingP;
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self.idx = 0;
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self.idx = 0;
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}
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}
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}
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}
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