Our SEM.
Go to file
Rahix 458d577f5d
All checks were successful
/ test (push) Successful in 10s
/ test (pull_request) Successful in 10s
succbone: Update panel drawings
- Add MODBUS components
- Add network topology overview which shows addresses
2024-11-10 09:20:31 +01:00
.forgejo/workflows succd: add ci, tests 2024-09-28 16:09:07 +02:00
logs logs: Add log of idle vacuum after roughing for 42min 2024-09-20 03:08:52 +02:00
modules/ph00524 ph00524: Add image of the back PCB side 2024-10-05 03:11:29 +02:00
succbone succbone: Update panel drawings 2024-11-10 09:20:31 +01:00
.gitattributes Track .stl files in git-lfs 2024-09-27 01:19:15 +02:00
.gitignore gitignore: Ignore FreeCAD backups 2024-09-23 05:04:34 +02:00